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![TIME:
TIME-SLOT MULTIPLEXED TIME-SLOT
INTERCHANGE SWITCH INTERCHANGE
T ¥
i
ANALOG | VOICEBANO [95-120 i i 05-120] vaiceBAND| ANALOG
TRUNKS | INTERFACE : H INTERFACE | TRUNKS
i 2
I
TIME | SPACE STAGES SPACE ; TIME
SWITCH SWITCH SPACE SWITCH | SWITCH som
SWiTCH
58-120) gigrouP | DIGITAL
TERMINAL | TRUNKS
gigitac | orGrour [05120
TRUNKS | TERMINAL
i
'
.
Fig. 5—No. 4 ESS time-division network topology.
semiconductor devices and on the characteristics of newly available
solid-state memory units, another decision was made to operate the
network at a rate of 128 time slots per PCM frame (125 usec).
One of the early network topologies featured a combined concentrator,
time switch and PCM codec. This was augmented with a three-stage space
switch employing high-speed logic-gate switching elements. Such a
network design, when concentrating 140 trunks on 128 time slots, was
expected to be capable of handling about 72,000 trunks, each operating
at 0.7 occupancy.
As development proceeded, the need for a still larger network was
recognized. It was also decided to separate the PCM codec and time-
switch functions to permit future digital signal processing (such as echo
suppression) independent of switching. This led to the final network
topology shown in Fig. 5. In this arrangement, the four-stage space-
switch functions are distributed in two separate frame types—a time-
multiplexed switch frame, and a time-slot interchange frame. The
time-switch functions reside in the time-slot](https://files.mastodon.social/media_attachments/files/115/806/603/333/276/794/original/6126c73ad20b0e27.png)
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